Implementation of Sub-Nyquist Sampling System Based on Compressed Sensing

This paper describes the development of a sub-Nyquist sampling system that can digitize high-speed signals using a low-speed analog to digital converter (ADC). The system is implemented by a field programmable gate array (FPGA), and it is possible to make change to the equivalent sampling frequency according to the practical applications. As an application of the compressed sensing (CS) theory, for the spectrally sparse analog signal sampling, the proposed system has the potential to break though the constraint of Shannon theorem and the bandwidth barrier of state-of-the-art ADCs. Potential limitations of the applicability of CS-based sampling system are also discussed. Experimental results show that this sampling system is able to capture spectrally sparse analog signal at an equivalent sampling rate of 500 MHz while sampled at a rate of no more than 100 MHz physically.